typedef int32_t MyData;
#define BLOCK 128
const unsigned int BSIZE = BLOCK;

#pragma omp target device(fpga)
#pragma omp task in([BSIZE]in1, [BSIZE]in2) out([BSIZE]out)
void acc_vadd(const MyData *const restrict in1,
              const MyData *const restrict in2,
                    MyData *const restrict out)
{  
 loop_vector_add_pipeline:
  for (u_int16_t i=0 ; i<BLOCK ; i++)
    {
#     pragma HLS pipeline II=1
      
      out[i] = (in1[i] + in2[i]);
    }

  return;
}

/********************** VIVADO HLS REPORT ********************/
/* Target Board: ZedBoard                                    */
/*************************************************************/
/* DSP48E      0 used |    220 available -  0.0% utilization */
/* BRAM_18K   11 used |    280 available - 3.93% utilization */
/* LUT      8729 used |  53200 available -16.41% utilization */
/* FF       5569 used | 106400 available - 5.23% utilization */
/*************************************************************/
