Loading timing.h +2 −1 Original line number Diff line number Diff line Loading @@ -72,7 +72,8 @@ typedef struct { double compose; // double phase; // double write; // double total; } timing_t; double total; double offload;} timing_t; extern timing_t timing_wt; // wall-clock process timing, at Task 0 Loading w-stacking.cu +4 −3 Original line number Diff line number Diff line Loading @@ -420,8 +420,9 @@ void wstack( } } #ifdef ACCOMP #pragma omp target exit data map(delete:uu[0:num_points], vv[0:num_points], ww[0:num_points], vis_real[0:Nvis], vis_img[0:Nvis], weight[0:Nvis/freq_per_chan], grid[0:2*num_w_planes*grid_size_x*grid_size_y]) #endif // End switch between CUDA and CPU versions #endif //for (int i=0; i<100000; i++)printf("%f\n",grid[i]); Loading w-stacking.h +3 −0 Original line number Diff line number Diff line Loading @@ -82,6 +82,9 @@ void phase_correction( int); #ifdef ACCOMP #pragma omp declare target (gauss_kernel_norm) #endif #ifdef __CUDACC__ extern "C" Loading Loading
timing.h +2 −1 Original line number Diff line number Diff line Loading @@ -72,7 +72,8 @@ typedef struct { double compose; // double phase; // double write; // double total; } timing_t; double total; double offload;} timing_t; extern timing_t timing_wt; // wall-clock process timing, at Task 0 Loading
w-stacking.cu +4 −3 Original line number Diff line number Diff line Loading @@ -420,8 +420,9 @@ void wstack( } } #ifdef ACCOMP #pragma omp target exit data map(delete:uu[0:num_points], vv[0:num_points], ww[0:num_points], vis_real[0:Nvis], vis_img[0:Nvis], weight[0:Nvis/freq_per_chan], grid[0:2*num_w_planes*grid_size_x*grid_size_y]) #endif // End switch between CUDA and CPU versions #endif //for (int i=0; i<100000; i++)printf("%f\n",grid[i]); Loading
w-stacking.h +3 −0 Original line number Diff line number Diff line Loading @@ -82,6 +82,9 @@ void phase_correction( int); #ifdef ACCOMP #pragma omp declare target (gauss_kernel_norm) #endif #ifdef __CUDACC__ extern "C" Loading